FutureWiz
loading...
Thank you for your query. We will reply to you at the earliest.

ONFI 6/5.2

Products >> Verification IPs >> ONFI 6/5.2

ONFI 6.0 Verification IP

Truechip's ONFI Verification IP provides an effective & efficient Deliverables way to verify the ONFI components of an IP or SoC. Truechip's VIP is fully compliant with ONFI 6.0 specifications. The VIP is light weight with easy plug-and-play components so that there is no hit on the design cycle time.

Key Benefits

  • Available in native System Verilog (UVM/OVM/VMM) and Verilog
  • Unique development methodology to ensure the highest levels of quality
  • Availability of Compliance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and cover points with connectivity examples for all the components
  • Consistency of interface, installation, operation, and documentation across all our VIPs
  • Provide complete solutions and easy integration in IP and SoC environment

Features

  • Compliant with ONFI 5.0/5.1/5.2/JESD230G/6.0 specifications.
  • Supports SDR, NV-DDR, NV-DDR2/3 and NV-LPDDR4 timing modes as per ONFI version
  • Supports both Conventional and SCA protocols.
  • Supports direct backdoor access for data loading in Flash Memory
  • Supports run time configuration of page parameter data in Flash Memory
  • Supports all mandatory and optional commands.
  • Supports 16-bit (SDR only) and 8-bit (all interfaces) bus width operations.
  • Supports Read ID commands.
  • Supports Synchronous reset commands.
  • Supports Interleaved/ Multi-plane commands.
  • Supports Multiple LUN Operation.
  • Supports Reset LUN commands.
  • Supports Decision Feedback Equalization (DFE) with DQ Pre-drive
  • Supports Data Bus Inversion (DBI)
  • Supports Power Isolated LTT (PI-LTT) for 0.6V VccQL
  • Supports Write/Read Duty Cycle Adjustments (WDCA/RDCA)
  • Supports Fast set/get features
  • Supports DCC Training commands.
  • Supports Read DQ Training commands.
  • Supports Write TX DQ Training Pattern/ Training read back commands.
  • Configurable timing mode
  • Supports copy back programming.
  • Supports dual data bus.
  • Supports Small Data Move command for both Program and Copyback operations.
  • SCA packet support: SCE, SCP, SCT and LUN selection routing
  • On-the-fly protocol and data checking.
  • Detects and reports the following errors.
    • Page address error
    • CRC error
    • Command not support error
    • Illegal command error
    • Lun address change error
    • Copyback program error
    • Change row address error
    • Read status enhanced error
    • Interleave page address error
  • Supports Volume select commands.
  • Callbacks in host, slave and monitor for user processing of data.
  • ONFI Verification IP comes with complete test suites to test every feature of ONFI specification.
  • Built in functional coverage analysis.

Deliverables

  • ONFI controller BFM/Agent
  • ONFI device BFM/ Agent
  • ONFI Monitor & Scoreboard
  • Test-Bench Configurations
  • Test Suite (Available in Source code)
    • Basic and Directed Protocol Tests
    • Random Tests and Error Scenario Tests
    • Assertions & Cover Point Tests
  •  Integration Guide, User Manual and Release Notes
Download the Product Brochure from here